Digital logic starts honestly with one chip: the 74LS00, four NAND gates in a 14-pin package, the same part number your parents' textbooks used. Today we wire a single gate, extract its truth table by hand, and then use the fact that everything else can be built from it, which is not a slogan but a construction you can do before lunch.

One gate, two switches, one LED

At sim.devoltapp.com, on a Breadboard (400) with the Bench PSU at 5 V:

1. Place a 74LS00 across the centre gap. Hover its pins and they name themselves the way the datasheet does: gate 1 is 1A and 1B in, 1Y out, with VCC and GND at the far corners. Wire the supply pair first; a chip with no supply produces the kind of mystery readings that teach an unplanned lesson about power.
2. Two Switch (SPST) parts, each wired from 1A and 1B respectively to ground, each with a 10 kΩ pull-up resistor from that input to 5 V. Switch open: input reads high. Switch closed: low. This is the pull-up pattern from earlier in the series doing another tour of duty.
3. Red LED plus 330 Ω from 1Y to ground.

Run it and work the switches through all four combinations, reading the LED:

The output is high in every row except both-inputs-high: NOT AND, NAND. You have measured a truth table, which beats memorising one.

Probe 1Y with the multimeter while you flip: high sits around 3.4 V and low near 0.2 V, not the tidy 5 and 0 of the whiteboard. Those are honest LS-family output levels, and the downstream gates accept them because their input thresholds are built for exactly this. The simulator models the levels and the thresholds; the logic analyzer's auto-threshold feature (a Pro tool worth knowing exists) reads the receiving chip's family and sets its decision level accordingly.

The universal gate, demonstrated

NAND's party trick is that the other gates are just NANDs in costume. Two constructions to build on the same board, using the chip's spare gates:

• NOT: tie a spare gate's two inputs together (2A to 2B) and feed them from one switch. Its output inverts: input high, output low.
• AND: feed gate 1's output (1Y) into that inverter's tied inputs. The LED, moved to 2Y, now lights only when both switches are high. You have built AND from two NANDs, which is why "NAND is universal" appears in every syllabus: with enough of them, OR, XOR, and eventually a computer follow.

The XOR construction takes four NANDs, exactly one chip's worth, and makes a satisfying extension exercise; the 74LS86 in the palette is there afterwards to check your answer against.

Where the curriculum goes from here

The palette's Logic ICs group carries the rest of the classic line: 74LS04 inverters, 74LS08 ANDs, 74LS32 ORs, counters and shift registers for the week your class discovers state. When gates start switching fast, the oscilloscope's trigger mode from earlier in this series is the right eye for it, and the analysis workbench's logic analyzer view (Pro) shows eight lanes of it at once.

If you teach this material, the structured version already exists: de:volt Learn's Logic Gates course walks HIGH and LOW through NAND, latches, and a half-adder capstone across eight modules with checked objectives, using these same chips. It is a Pro and schools-tier course, at learn.devoltapp.com.

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